Intel and Softbank aim ZAM at HBM

Intel is partnering with Softbank subsidiary SAIMEMORY to indirectly get back in the memory business by developing Z-Angle Memory (ZAM) based, like high-bandwidth memory (HBM), on stacked DRAM

Intel engineers wanted to increase memory capacity and performance while reducing energy usage. They were involved in a US Advanced Memory Technology (AMT) research and development program. This was jointly run by the US Department of Energy and National Nuclear Security Administration (NNSA). The engineers developed a way of bonding stacked layers of DRAM in a Next Generation DRAM Bonding (NGDB) project, demonstrating higher DRAM density and bandwidth with lower latency and energy consumption. Intel is now collaborating with SAIMEMORY to commercialize ZAM for high-performance computing and AI, contributing the base technology, with University of Tokyo academic patents also involved.

Dr. Joshua Fryman, Intel Fellow and CTO of Intel Government Technologies, said: “Intel’s Next Generation DRAM Bonding (NGDB) initiative has demonstrated a novel memory architecture and revolutionary assembly methodology that significantly increases DRAM performance, reduces power consumption, and optimizes memory costs. Standard memory architectures aren’t meeting AI needs, so NGDB defined a whole new approach to accelerate us through the next decade.”

Some reports mention a base die with eight layers of DRAM stacked above it. Others suggest a doubling of HBM density or more, an up to 512 GB chip, and half the power consumption. (The HBM generation level isn’t identified.

A Sandia article shows a low resolution ZAM image. The image caption says “The cross-section of an NGDB test assembly above illustrates the unconventional assembly. Eight wafers containing the novel NGDB DRAM architecture are vertically bonded on a base wafer and connected using an alternative “via-in-one” construct. (Photo provided by Intel)” We have not been able to source the Intel image.

We have based a diagram on this image, hopefully making things clearer;

In contrast to HBM with many TSVs (Through Silicon Vias – electrical signal connection paths) passing through the layers of DRAM, there is a single “Via-in-one” TSV providing power and signals to each wafer via a contact ring. That would mean more space for DRAM in the wafers as less TSV space would be needed.

SAIMEMORY is headquartered in Tokyo and is owned by Softbank, the technology investment holding company. It was set up by Softbank in December 2024 to develop AI-focussed, next-generation semiconductor memory technologies as an alternative to HBM, with its name changing from placeholder text to SAIMEMORY in May 2025. This is not a traditional founder/engineer-led startup/

Its president and CEO is Hideya Yamaguchi and CTO Stephen Morein, who joined in August last year. Yamaguchi comes from a near 40-year career at Toshiba Corp. in the semiconductor area, and has much experience in global semiconductor markets, directing SoC engineering, coordinating sales subsidiaries, and supporting international expansion.

Morein came from Intel where he was a senior principal engineer, and systems and silicon architect.His LinkedIn entry says he is a co-founder of SAIMEMORY. He joined it to bring new technology for memory to commercial availability.

Softbank plans to invest ¥3 billion ($20 million) in SAIMEMORY by its fiscal 2027. Fujitsu is also involved with SAIMEMORY, contributing along with Japan’s RIKEN National Research Institute, ¥1 billion ($7 million). We understand other collaborators include Shinko Electric Industries, Powerchip Semiconductor Manufacturing, and the University of Tokyo.

Intel would not be involved in DRAM manufacturing; Powerchip would do that. There doesn’t appear to be an Intel foundry play here, unless it is involved in making the base logic layer.

Japan was once a player in the semiconductor memory market but that role lapsed with, for example, Micron buying Elpida in 2012. Now memory production is dominated by S. Korea firms Samsung and SK Hynix. SAIMEMORY can be seen as a potential way for Japan to re-enter the semiconductor memory market.

SAIMEMORY operations are targeted to begin this quarter, Q1 2026, with prototypes in 2027 and commercialization by 2030. By that time we could be looking at HBM5 or beyond.